NAND Trends: Higher Prices, Smaller Geometries

Laptops and notebooks incorporating SSDs will reflect the price increases and compare less favorably to computers with conventional hard drives

March 28, 2009

4 Min Read
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As NAND prices fell throughout 2008, bottoming out at around 85 cents per GB, it looked like the prospect of inexpensive mobile devices and continuous downward pressures on solid-state technology might aid adoption by enterprises. This year, however, it looks like NAND manufacturers are focusing less on market share and more on profitability.

The end result is higher prices for NAND in 2009, propelled by purposeful reductions in fabrication capacity. "What we are seeing is the end of a cycle of over-investment by manufacturers in NAND capacity over the past few years," says Greg Wong, principle analyst with Forward Insights), a semiconductor industry researcher. "Demand dropped across the board in fourth quarter, 2008, and now we are at a place where there is more capacity than demand." As a consequence of price declines and over-capacity, many NAND and SSD manufacturers lost money.

By aggressively cutting capacity in first quarter of this year, semiconductor manufacturers have reduced NAND supplies and, as a result, NAND prices have doubled to $1.50 to $1.60 per GB. Predictably, this is likely to raise NAND and SSD component costs in business and consumer mobile devices and in SSDs for enterprise computing and storage. Analysts like Wong still cite total cost of ownership as the cost-determining factor for enterprise decision-making, which may reduce the importance of individual NAND and SSD component price spikes. "TCO is more than the cost of one component in the entire storage solution," says Wong. "For example, an enterprise can be looking at the comparative TCO when it can replace an entire array of hard disks with an SSD. That still makes a compelling cost argument."

For enterprises, the price increases are likely to be more visible and may have an impact. With the price of NAND going up, laptops and notebooks incorporating SSDs will reflect those price increases and will compare even less favorably to laptops and notebooks containing conventional hard drives. For IT managers who buy hundreds or thousands of mobile computers, that can make a significant difference.

Dips and spikes in semiconductor prices are not new, and spot markets for these commodities have existed for decades. If you are an enterprise IT manager, monitoring these prices is not typically part of your daily routine. But you do hope for transformational technologies that will lower both the raw commodity prices of memory and the TCO costs without the normal weather changes of spot markets. Traditionally in semiconductors, this has meant shrinking geometries that allow semiconductor manufacturers to produce more with less.While capacity and production cutbacks may stabilize prices, smaller geometries will exert pressure in the other direction for NAND memory. Manufacturers will produce more chips and lower manufacturing costs or raise the capacity of the chips they product for the same costs. Major semiconductor companies are all moving forward in this downward scaling, as they work to ensure that performance, endurance, and other critical measures of memory and storage success do not decline.

Wong sees the need to accelerate process technology migrations as one way to cost-effectively produce NAND, but he also sees a move to three-bit-per-cell technologies that lower overall costs of manufacture. Sandisk/Toshiba is already producing NAND with three bits per cell, and virtually every other manufacturer has that objective on its near-term roadmap.

"The main obstacles are know-how and learning," says Wong. "An ongoing challenge is the difficulty in shrinking the horizontal dimension of the memory cell. Also, all of the semiconductor memory cells are on one plane. With new technologies like 3D memory stacking, you can add layers of memory cells on top of each other. When you do this, the manufacturing cost per bit goes down. With three and four bits per cell, you can easily and cost-effectively build your capacity so that you can produce a 32-gigabit multi-level cell using 43-nanometer technology. If you layer four bits per cell, you can produce a 64-gigabit chip."

The big challenge is to make sure these new production approaches don't degrade performance and endurance, the key concerns of the enterprise market. "The key is finding the right applications for these new technologies," he says. "If, for example, you look at a mobile consumer device, the performance specifications are not as rigorous as they are for enterprises. Many consumer devices are what we term 'occasional use' models, which inherently place less demand on endurance. But in an enterprise, you're running 24/7 operations, with many of those operations built around heavy-duty transaction processing. This is a not a good use of these newer NAND memory technologies."

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